x86/mm: Fix one more check in the EPT p2m code

This is one more place that needs to check for 0 entries
after the AMD p2m-sharing patch made p2m_ram_rw == 0

Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index d86a663d86bc2a629be868fbe316088921737f7b..e05d14b072d98d617a524e528a8385e57903e4f9 100644 (file)
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -736,7 +736,7 @@ void ept_change_entry_emt_with_range(struct domain *d,
         uint64_t trunk = 0;
 
         e = ept_get_entry_content(p2m, gfn, &level);
-        if ( !p2m_has_emt(e.sa_p2mt) )
+        if ( !is_epte_present(&e) || !p2m_has_emt(e.sa_p2mt) )
             continue;
 
         order = 0;